1. Field of the Present Invention
The present invention relates to a solid state imaging device, its manufacturing method and a solid state imaging apparatus. More particularly, the present invention relates to a solid state imaging device which uses a MOS image sensor based on a threshold voltage modulation system used for a video camera, an electronic camera, an image input camera, a scanner, a facsimile or the like, its manufacturing method and a solid state imaging apparatus.
2. Description of the Prior Art
Because of its high mass productivity, a semiconductor image sensor such as a CCD image sensor, a MOS image sensor or the like has been applied to almost all types of image input devices following the progress in a pattern microfabrication technology.
Particularly, in recent years, the applicability of the MOS image sensor has been recognized again because of its advantages, i.e., lower power consumption compared with that of the CCD image sensor, and the capability of making a sensor device and a peripheral circuit device by the same CMOS technology.
FIG. 1 is a sectional view showing such a MOS image sensor.
In the drawing, a photodetection diode 311 and a MOS transistor 312 for optical signal detection constitute one unit pixel. To isolate adjacent unit pixels from each other, an element isolation insulating film 214 is formed on a semiconductor layer 212 in an element isolation region. In addition, a light shielding film 223 is formed on a coating insulating film 226 in such way as to cover the MOS transistor for optical signal detection. The light shielding film 223 includes a light receiving window 224 formed on the light receiving portion of the photodetection diode 311 to transmit an optical signal.
In both of the forming regions of the photodetection diode 311 and the MOS transistor 312 for optical signal detection, well regions 215a and 215b are formed on the surface of the semiconductor layer 212.
Source and drain regions 216 and 217a are formed in the well region 215b of the MOS transistor 312. On the other hand, on the surface of the well region 215a of the photodetection diode 311, a region 217 of one conductivity type is formed to be connected to the drain region 217a of one conductivity type and, thus, a buried structure is formed for optically generated charges.
A source electrode 220 is connected to the source region 216, and a drain electrode 222 is connected to the region 217 of one conductivity type, i.e., the drain region 217a. Further, a gate electrode 219 is formed above a channel region 215c between the source and drain regions 216 and 217a by interpolating a gate insulating film 218.
In the vicinity of the source region 216, a hole pocket (carrier pocket) 225 is formed in the well region 215b. In this pocket, light generation holes are stored, and a threshold of the MOS transistor 312 is changed in proportion to the storage amount of such light generation holes.
A series of operations of the MOS image sensor are passed through an initializing period, a storing period and a reading period. During the initializing period, a high reverse voltage is applied to each electrode for depletion, and light generation holes remaining in the hole pocket 225 are discharged. During the storing period, light generation holes are formed by light irradiation and then stored in the hole pocket 225. Then, during the reading period, an optical signal proportional to the storage amount of light generation holes is detected.
By the way, In the MOS image sensor, defects tend to occur in an interface between the element isolation insulating film 214 and the semiconductor layer 212 and, in most cases, holes are captured in the defects. These holes are discharged during the initializing or storing period. The holes are injected through the depleted n type semiconductor layer 212 into the p type well regions 215a and 215b, and then stored in the hole pocket 225. The holes discharged from the defects and stored in the hole pocket 225 result in the generation of fixed pattern noise.
The object of the present present invention is to provide a solid state imaging device, which employs a MOS image sensor capable of suppressing fixed pattern noise generated by charges discharged from defects in an interface or the like between an element isolation insulating film and a semiconductor layer, and performing much more microfabrication. The object of the present invention is also to provide a manufacturing method of the solid state imaging device and a solid state imaging apparatus equipped with the solid state imaging device.
The present invention is directed to a solid state imaging device. As shown in FIG. 3A, the present invention includes a unit pixel 101 which, in turn, includes a photodetection diode 111 and an insulated gate field effect transistor (MOS transistor) 112 adjacent to the photodetection diode 111 for optical signal detection, wherein an element isolation insulating film 14 is formed so as to isolate adjacent unit pixels 101 from each other, and an element isolation region 13 of an opposite conductivity type to that of a second semiconductor layer 12, the element isolation region 13 isolating the second semiconductor layer 12, is formed under a lower surface of the element isolation insulating film 14, so as to reach first semiconductor layer 11.
Either an impurity region 17 or a drain region 17b is formed so as to be extended near the element isolation region 13, and a drain electrode 22 is formed near the element isolation region 13 so as to be connected to either the impurity region 17 or the drain region 17b. 
The photodetection diode 111 and the insulated gate field effect transistor (MOS transistor) 112 for optical signal detection are formed in well regions 15a and 15b connected to each-other, and comprise a buried layer having a high concentration (carrier pocket) 25 for storing optically generated charges in the well region 15b in the peripheral portion of a source region of the MOS transistor 112 for optical signal detection.
Generally, there are many levels in an interface between the insulating film and the semiconductor layer. Especially, in the case that the element isolation insulating film 14 is formed by local oxidation of silicon (LOCOS), defects caused by thermal distortion tend to occur in addition to an interface state. In the case that the drain regions 17a and 17b are adjacent to the element isolation insulating film 14, in the end portions of the drain regions 17a and 17b, a pn junction tail end of the drain regions 17a and 17b is in contact with the surface, and a surface state is included in a depletion layer extending transversely from the drain regions 17a and 17b. Consequently, current leakage is apt to occur. As described above, according to the present invention, the element isolation region 13 of a conductivity type opposite that of the second semiconductor layer 12, which isolates the second semiconductor layer 12 to reach the first semiconductor layer 11, is formed under the entire lower surface of the element isolation insulating film 14. Thus, in initializing and storing periods, when a positive voltage is applied to the n type drain regions 17a and 17b, a depletion layer extending from the p type well regions 15a and 15b or the p type substrate 11 reaches only the outer peripheral portion of the element isolation region 13 without extending to therein and, hence, the defects in the interface are not covered with the depletion layer. Therefore, charges captured in the defects of the interface can be prevented from being discharged into the depletion layer, and it is possible to suppress fixed pattern noise generated by the storage of charges in the hole pocket (carrier pocket) 25 caused by such defects in the interface.
A drain electrode 22 is provided in the end portion of the drain region 17b and near the element isolation region 13. In initializing and storing periods, the drain electrode 22 is set at the highest potential, while the substrate 11 and the element isolation region 13 connected to the substrate 11 are set at the lowest potential. In other words, since the drain electrode 22 and the element isolation region 13 are close to each other, as shown in FIG. 6B, a steep potential inclination is created from the drain electrode 22 to the element isolation region 13. Even if current leakage occurs in the end portions of the drain regions 17a and 17b due to this potential inclination, charges causing current leakage immediately flow toward the substrate 11, and the leakage current scarcely flows to the well regions 15a and 15b, that is, to the hole pocket 25.
Accordingly, it is possible to further suppress fixed pattern noise generated by the storage of charges in the hole pocket 25 owing to the defects.
In the case that the well region or the like has a conductivity type opposite the foregoing, in other words, in the case that the buried layer having a high concentration is an n type, the buried layer having a high concentration becomes an electron pocket (carrier pocket) to store light generation electrons. In the initializing and storing periods, the drain electrode is set at the lowest potential, while the substrate and the element isolation region connected to the substrate are set at the highest potential. Thus, even if current leakage occurs in the end portion of the drain region, charges causing current leakage immediately flow toward the substrate 11, and the leakage current scarcely flows to the electron pocket.
Since the element isolation insulating film is formed on the element isolation region such that the entire lower surface thereof can be included in the element isolation region, charges captured in the defects of the interface can be prevented from being discharged in the depletion layer thereof. It is therefore possible to suppress fixed pattern noise generated by the storage of charges in the electron pocket owing to such defects in the interface.
The present invention is directed also to the solid state imaging device, the method of manufacturing the same and the solid imaging apparatus. Another fundamental constitution of the solid state imaging device is as follows. As shown in FIG. 11, a plurality of unit pixels 101 are arrayed, each thereof including a photodetection diode 111 and an insulated gate field effect transistor (MOS transistor) 112 adjacently to the photodetection diode 111 for optical signal detection, and adjacent unit pixels are isolated from each other by an element isolation electrode 19a. 
Further, as shown in FIG. 12A, the solid state imaging device comprises a carrier pocket 25 near and along a source region 16 in a well region 15b below a gate electrode 19 of the MOS transistor 112. The carrier pocket 25 has a higher concentration of p type impurities than that of the well regions 15a and 15b and stores optically generated charges generated in the photodetection diode 111.
A manufacturing method of the solid state imaging device according to the present invention comprises the steps of: as shown in FIG. 13D, forming a gate insulating film 18, and an insulating film 18a similar to the gate insulating film 18 in an element isolation region 113 for isolating adjacent unit pixels 101 from each other; patterning a conductive film to form a gate electrode 19 on the gate insulating film 18, and an element isolation electrode 19a on the insulating film 18a; and as shown in FIG. 13E, by using the gate electrode 19 and the element isolation electrode 19a as masks; forming regions of an opposite conductivity type such as source regions 16a and 16b, drains regions 17a and 17b or the like and isolating elements, by introducing impurities of an opposite conductivity type In other words, adjacent regions of an opposite conductivity type between the unit pixels below the element isolation electrode 19a are isolated from each other.
If the gate electrode has a ring shape, drain regions 17a and 17b and impurity regions of the adjacent unit pixels 101 are isolated from each other below the element isolation electrode 19a. 
On the other hand, if the gate electrode 19 has a square shape, among the source, drain and impurity regions of the adjacent unit pixels, the regions adjacent to each other are isolated below the element isolation electrode 19a. In other words, the source regions of the adjacent unit pixels are isolated from each other, alternatively the source, drain and impurity regions are isolated from one another, otherwise the drain and impurity regions are isolated from each other below the element isolation electrode 19a. 
According to the present invention, as described above, element isolation regions are made of impurity regions of opposite conductivity type. Thus, the occurrence of defects caused by thermal distortion can be suppressed, and current leakage caused by the interface state can be greatly reduced. It is therefore possible to suppress fixed pattern noise generated by the storage of charges other than optically generated charges in the hole pocket (carrier pocket) 25.
In addition, a diffusion separation region 13 is formed below the element isolation electrode 19a. The diffusion layer 13 isolates an n type well layer (a layer of an opposite conductivity type) 12 and reaches the substrate 11. In the case that the diffusion separation region 13 is a p type, since a potential like that shown in FIG. 14 is formed for holes near the diffusion separation region 13 by setting the diffusion separation region 13 at a ground potential or a negative potential while the substrate 11 is set at a ground or negative potential, holes from such defects can be discharged through the diffusion separation region 13 to the substrate 11. Thus, the holes can be prevented from flowing to the carrier pocket 25, even if defects or the like occur in a boundary between the drain regions 17a and 17b near the element isolation region 13 or between the impurity region 17 and the insulating film 18a. It is therefore possible to further suppress fixed pattern noise generated by the storage of charges in the carrier pocket 25 owing to the defects.
According to the present invention, much more microfabrication can be achieved by forming element isolation regions made of impurity regions of opposite conductivity type.
By incorporating the solid state imaging device having the foregoing features in a solid state imaging apparatus, such as a video camera, an electronic camera, an image input camera, a scanner, a facsimile or the like, it is possible to miniaturize the apparatus and improve image quality.